MUNICH, Germany-March 12, 2001-DATE Conference-Real Intent Inc. (Santa Clara, Calif.), an EDA company that offers products for the formal verification of RTL (Register Transfer Level) designs, announced today that its Verix™ verification product adds support for VHDL and mixed Verilog and VHDL designs.

Verix dramatically improves verification and design productivity by finding and eliminating errors early in the design cycle.

Verix is Real Intent's Intent-Driven formal verification system for the verification of RTL designs. Verix speeds the design of high-end semiconductors and systems-on-chip (SOCs) by verifying that the design implements the designer's intent, at the Register transfer or RT-level. With its RTL-in and results-out model, the automatic Verix Implied Intent mode is the industry's easiest to use formal verification, giving users the confidence provided by the exhaustive analysis of formal verification.

A Verilog version of Verix was first released in July 2000 has been integrated into production design flows at a number of companies.

What users say Sanjeev Renjen, Senior VP of Engineering, VxTel said, "In our competitive business, it is extremely important to get the first silicon right. Verix automatically provided a very high coverage for the design, in a manner that is complimentary to our simulation based flow. We have adopted Verix as an essential part of our verification flow. We require that all design blocks run through Verix as a part of our tape-out criteria."

Srini Krishnaswami, VP Silicon Design, Lightsand Communications said, "Verix requires minimal user effort and we have committed to use it as a standard part of our design flow. Easy detection of these errors is saving us valuable time in the later parts of the design cycle."

Availability
Verix is available now for Verilog users, and runs on Solaris, HPUX, and Linux operation systems. A VHDL and mixed language version will be released in 2001Q2.

About Real Intent and Intent-Driven Verification 
Real Intent offers tools for an intent-driven design formal verification approach that promise to revolutionize functional electronic design verification. Real Intent's products formally verify that the design implements the designer's intent, at the earliest opportunity in the design cycle. Its products enable chip designs to rapidly reach quality goals with reduced effort. The Company's products are complementary to simulation and address the problems with conventional simulation-based verification approaches that are testbench limited and require a large amount of resources to drive the simulation and design debugging processes. 

Real Intent has harnessed advanced formal verification technology into the powerful, yet easy to use Verix family of products. Real Intent is located at 3910 Freedom Circle, Suite 102A, Santa Clara, CA 95054, tel.: (408) 982-5444, fax: (408) 982-5443, email: info@realintent.com , web: http://www.realintent.com .

For more information, contact:

Real Intent
Stephen R. Pollock
(408) 982-5412
pollock@realintent.com 

Valley Public Relations
Georgia Marszalek
(650) 345-7477
georgia@valleypr.com 

Dick Selwood
PR Practitioner for Real Intent in Europe
+44 (0) 1962 853781
dick@winterb.demon.co.uk

Real Intent and Verix are trademarks of Real Intent, Inc.
All other tradenames and trademarks are the property of their respective owners.